Building the : Cart64out by Sven Petersen ( kits available )

I've been looking at cart breakouts for quite a while now, but I've not had the skills or equipment to warrant one, that is, until now.  I recently bought and started using a Digital logic probe from Kingst and it it is a wonderful piece of kit.

So with my Kinst probe in conjunction with Sven's cart I am now looking at two more projects:

    1) Cart repair : I have two carts that I need to repair, both of which seem to be fine, but just don't work.

    2) Cart design : I'd like to try my hand at building a cart with a CPLD or FPGA.

Anyhow this build was pretty simple but I think It's going to be really handy.  The parts themselves are readily available apart from the cart edge connector, luckily the vendor was pretty good and I got a personalized deal for 30 units.  This is fine as I'll use them for board repairs and I may sell a few.

This is a bit of a niche project, I have quite a few spare boards and parts.

If you're in Australia and would like one please get in contact with me.  If you're outside of Australia, it's probably not worth while due to postage costs. 

The cost is $30 (AUD) for a full unassembled kit which includes:

• 1 x PCB
• 1 x edge connector
• 1 x 40 pin connector
• 1 x 18 pin header ( you can remove the 5v and GND pins if you wish like I have )
• 1 x momentary switch
• 1 x resistor network
• 2 x standoffs
• 2 x screws
• 7 x jumpers
• Standard Tracked parcel post to anywhere in Australia
  

I'm probably losing money on this I'm too scared to do the sums and find out, but it would be cool to see them other peoples hands.

Repair : Commodore 128 blackscreen repair - part 2

This is a continuation of the Commodore 128 blackscreen repair.

Ohh Ohhhhh . . . We're half way there . . . 

Just before I started recapping the C128 I suddenly had a thought. I had only run the C64 diagnostics, was that really enough? 

It turns out that the C128 mode of a C128 does not check it's memory on startup and the C64 dead test cartridge only tests the 64K of RAM in the LOW Bank and ignores the HIGH Bank.

However do not fear there is also a C128 dead test cart available.  I went to the World of Jani and downloaded an image from the collection he has amassed in this awesome blog post : Diagnostic Carts and Manuals.

Making a C128 diagnostic cart

I downloaded a cart from from the World of Jani on to a 8K EPROM 27C64 and tried it with one of the many VersaZif64 carts that I had made quite a while ago.

No matter what I tried I could not get it to work.  I read Jani's blog on making C128 carts and decided that even though the ROM image was only 4K, a 16K cart was probably required for it to work.

So I tried using the 785260 image on a 16K EPROM 27C128 and it worked first go.  For the VersaZif64 cart you need to set the all DIPs to OFF and then turn the selector to 16K

Where's the rest of the RAM?

Running the C128 Diagnostic Cart it brought up the unseen memory issues lurking in the background.

** You can ignore the other errors, I do not have a test harness installed. **

 

I tried putting RAM dips over the existing dips and it didn't change.  Then I replaced both U46 and U47 and it still did not change.  That's really weird.  I thought maybe the Diag Cart is wrong so I downloaded memtest64 from this article.  However it also told me there was a memory issue.  Interestingly when I loaded it, it would sometimes just start the machine code monitor and on one occasion the  Diagnostic Cart also started the Machine Code monitor when it was running.

This is one of the symptoms of the C128 Kernel ROM being bad ( the low one I think ).  I pulled both the High and Low Kernel ROM's, tested them and they were both completely fine.

My next thought was that one of more of the logic chips had failed.  There are a lot of chips so I thought I'd probe around with my Oscilloscope to try to find the culprit, rather than just trying pot luck replacing the chips one by one.

 

However in the end it was just bad RAM and I replaced the entire high ram bank and it fixed the issue.

Recapping

I find it a chore looking at the motherboards to get a parts list for recapping.  Luckily there's always someone whose compiled a list already ( and may even sell you kits ).

I used the parts list from here https://console5.com/wiki/Commodore_128 but I sourced the caps myself as I wanted to do quite a few machines.

The caps in the machine overall looked in pretty good condition, until I popped open the shielding on the video chips.  One of the caps had a nasty burn mark on it.

 

The risk of buying chips online

 So far I’ve been pretty lucky buying chips from the internet but recently ( 2021 ). I have had two bad purchases on AliExpress.

The first purchase was 2 x 6510 CPU’s. This was a pretty easy dispute as one of the chips was broken in half and the other was dead.  This dispute was very quickly and easily resolved. 

On the second dispute I got scammed by a very schrewed and dishonest trader.  So I am going to document my lessons learned here for dealing with fake chip disputes on AliExpress. 

So here goes . .

When opening a dispute with AliExpress you need to document your dispute fully. 

1) take photos of the product front and back

2) take photos of the packaging front and back including all packing material

3) take SHORT videos of you testing the item as clearly as you can showing the item not working. 

4) write your issue in detail in full

5) when logging the issue only do "full refund no return"

6) do not engage the vendor if they try to get you to return the item.   Let AliExpress deal with them. 

I learnt a very hard lesson from this vendor and lost a lot of money. So in full disclosure I’m going to put it here.

I do not recommend buying from Liheng at Aliexpress.  Please note that they have a number of shop fronts such as Liheng1 and Liheng2 . . etc etc.  I suspect this is so they can cycle through thier stores to clean out negative feedback.

Atmel ATF1504AS(L) CPLD Development Board - Part 8 - Replacing Logic 74HC00

Time to experiment with replacing Logic chips.  This time I am going to replace a 74HC00 on a Z80-MBC2 board.

It's important to review not only the data sheet for the 74HC00, but also the Z80-MBC2 to ensure that it is appropriate.  For this experiment everything is running at 5Volts so it is safe to proceed.

You don't need a Z80-MBC you can just connect A and B to the VCC and GND lines in combinations and the Y lines to some LEDs.

However I wanted to see if it would work in a REAL system.

You can go to Hack a Day to learn more about the Z80-MBC.

 

74HC00 Datasheet

Let's first review the Datasheet, specifically we need to know how the 74HC00 operates and the pin out.  In this case it is very easy, there are four NAND gates in the DIP.

 

It should be strongly noted that we are implementing LOGIC only with the CPLD.  Some Logic chips have built in electrical characteristics that can not be replicated by the CPLD

 

Replicating the 74HC00 in Verilog

Now it's time to replicate the 74HC00 in Verilog.

As you can see on the image above there are Four NAND gates.

 

To save time having to type out each gate individually you can create an array of pins, the following declares 4 pins ( 0,1,2 and 3 ).

 

     input [3:0]  pinA

 

which is much better than this

 

    input pinA0    

    input pinA1

    input pinA3    

    input pinA4

 

Each gate has Two Inputs ( A and B ) and One Output ( Y ).

The Two inputs A and B are AND'ed togther and then the result is NOT'ed ( reversed ).

 

    Y = NOT ( A AND B )

 

In Verilog this is as follows where x is the pin number in the array.

 

    assign y[x] = ! ( a[x] & b[x] ) 

 

Let use also allocate the pins in a logical way in the Pin Planner.

Hooking it all up

Finally let's hook it up to the Z80-MBC2.  It is a bit tight for space so take your time with the wires.  I am using the Z80 to power the CPLD via pins 7 GND and 14 VCC.

Without the 74HC00 installed the computer stops at the line" IOS: Z80 is running from now".

It lives, the user prompt is ready and waiting for action.

Atmel ATF1504AS(L) CPLD Development Board - Part 7 - Using a Clock ( clk )

Buttons and LEDs are fine but it really doesn't come close to interfacing with real hardware.  So now to take the human element out of the equation and time to use a clock.

For this experiment I am using a 1 Mhz crystal oscillator.  It doesn't sound very fast but the untrained human eye can only really see somewhere less than 100Hz (see various debates on this on the internet).

This isn't a step by step, but I've given you big hints on how to avoid the big issues.

Happy learning!

The BOM

For this experiment I will be using the following items:

• 1 x CPLD Dev board
• 1 x LED array ( as seen previously, or you can just use 1 LED and a resistor )
• 2 x 4017 decade counters
• 1 x 1 Mhz crystal oscillator, any 5 volt, 1Mhz  4pin crystal oscillator will do.
• 1 x 01.uF capacitor
• Lots of Jumper wires
• LA2016 Logic Analyzer ( or any logic analyzer that can handle 5v )  (optional bonus content)
  

 

Failing and learning ( get a Logic Analyzer )

The one thing I learnt early on when constructing this experiment was that I simply could not get the clock division down to a low enough level to see the result.  What I really needed was a Logic Analyzer so I could actually see what was going on.  I went over and over the code trying to work out what was wrong with it and . . . there was nothing wrong.  I just didn't have the right instruments to tell me I was ok.

If you are going to continue your journey with CPLD's and FPGA's you are going to need one.  Go buy it now or you will just be frustrated.

Failing and learning part 2 (tie down all of the control input pins on the 4017)

 

The second issue I had was just failing to ground the reset and clock enable pins on the 4017.  Don't let control inputs float.  Either connect them to ground or to power.  I only realized at the end that I had not tied the reset pin to ground.  So frustrating.

 

Failing and learning part 3 (assign ALL pins on the CPLD)

I got mighty confused with the clocking because of the way the compiler works.  If you don't assign all of the outputs the compiler will assign random outputs on the internal buses that are not assigned to unassigned pins.  If you don't want to see output then assign them all to 0.

 

Example code

 

I originally wrote the code in Verilog, but as I didn't have a Logic Analyzer I failed and looked around for some example code.  Eventually I found Bil Herds example program on Hackaday and modified it for my own use.

 

The source is just a plain rip-off of Bil's project with a few modifications with the help of old school wisdom from my cousin.

Here are the pin assignments.

 

Why are you using 4017 decade counters?

 

This is pretty simple really.  When I first started this project I made some really rookie errors and couldn't get the clock less than about 122Hz with a little advice I managed to get it to work properly and no longer need them.

 

However, it is fun to used them and we get to learn a little more about how to interface with the CPLD.

Wiring up the board and Logic Analyzer output

 

Looking at the Analyzer you can see a number of signals.

1. This signal is the clock itself at 1MHz.
2. This is the output of the first CPLD counter at 3.90KHz
   
3. This is the output of the second CPLD counter at 49.90Hz
   
4. This is the output of the third CPLD counter at around 0.06Hz +/- a bit
   

 

Plugging the second CPLD output into the 4017's makes the LED flash a around once every 3 seconds.

And here is the finished product.