Time to experiment with replacing Logic chips. This time I am going to replace a 74HC00 on a Z80-MBC2 board.
It's important to review not only the data sheet for the 74HC00, but also the Z80-MBC2 to ensure that it is appropriate. For this experiment everything is running at 5Volts so it is safe to proceed.
You don't need a Z80-MBC you can just connect A and B to the VCC and GND lines in combinations and the Y lines to some LEDs.
However I wanted to see if it would work in a REAL system.
You can go to Hack a Day to learn more about the Z80-MBC.
74HC00 Datasheet
Let's first review the
Datasheet, specifically we need to know how the 74HC00 operates and the pin out. In this case it is very easy, there are four NAND gates in the DIP.
It should be strongly noted that we are implementing LOGIC only with the CPLD. Some Logic chips have built in electrical characteristics that can not be replicated by the CPLD
Replicating the 74HC00 in Verilog
Now it's time to replicate the 74HC00 in Verilog.
As you can see on the image above there are Four NAND gates.
To save time having to type out each gate individually you can create an array of pins, the following declares 4 pins ( 0,1,2 and 3 ).
input [3:0] pinA
which is much better than this
input pinA0
input pinA1
input pinA3
input pinA4
Each gate has Two Inputs ( A and B ) and One Output ( Y ).
The Two inputs A and B are AND'ed togther and then the result is NOT'ed ( reversed ).
Y = NOT ( A AND B )
In Verilog this is as follows where x is the pin number in the array.
assign y[x] = ! ( a[x] & b[x] )
Let use also allocate the pins in a logical way in the Pin Planner.
Hooking it all up
Finally let's hook it up to the Z80-MBC2. It is a bit tight for space so take your time with the wires. I am using the Z80 to power the CPLD via pins 7 GND and 14 VCC.
Without the 74HC00 installed the computer stops at the line" IOS: Z80 is running from now".
It lives, the user prompt is ready and waiting for action.
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